1. Field of Invention
This invention relates generally to magnetic-polarization control and more specifically to magnetic memory systems enhanced through the control of spin-polarized electrons.
2. Art Background
Present transistor-capacitor based metal oxide semiconductor (MOS) and complimentary metal oxide semiconductor (CMOS) non-volatile memory technologies are approaching practical memory density limits as the lithography and material processes have been scaled down to smaller geometries. The oxide thickness of flash memory cells cannot be made much thinner with existing materials without allowing the undesirable condition of hot electron tunneling to occur. Thus, a practical memory density limit is approaching for traditional transistor based non-volatile memory devices.
Electron spin based devices are being used as memory cells for the storage of data. For example, magnetic random access memory (MRAM) offers the possibility of replacing flash memory technology with a lower voltage, scalable technology. The spins of electrons are tied to magnetism, as in the ensemble of spins in a memory cell or quantum well device.
Presently constructed MRAM uses giant magneto-resistance (GMR) or magnetic tunnel junctions (MTJ) to control the sense/tunneling currents. These devices manipulate the magnetic state of the memory cell by using the coupling of strong magnetic fields induced by currents in conductors that are proximate with and magnetically coupled to the magnetic memory cell. Randomly polarized electrons conducted through these conductors are used to induce a strong magnetic field that causes reversing of opposing magnetic domains. This process requires a very high current density and dissipates large amounts of energy, hence it is inefficient and inconsistent with the requirements of scalable, low power memory.
The basic GMR memory cell uses a three-layer composite consisting of a weaker magnetic layer/non-magnetic conductor layer/stronger reference magnetic layer. The change in impedance across the cell varies between the two memory states corresponding to the alignment of the magnetic-polarizations of the two magnetic layers being aligned or anti-aligned. A larger impedance change between the aligned and anti-aligned states corresponds to a greater detectable signal level. Therefore, magnetic memory cells could be made smaller if the impedance change could be increased.
What is needed is a memory device that permits its magnetic-polarization to be changed using less power while providing a greater detectable signal. What is also needed is a magnetic memory device that is configurable in higher memory densities than are presently achievable with conventional flash memory architecture or present-MRAM memory cells.